1. Field of the Invention
The invention is in the field of computer architecture and more particularly in the areas of parallel computers and multiprocessing systems. The invention enhances throughput via hardware support for parallel processing and operating system efficiency. Programmer productivity is also enhanced using a hardware supported unique software structure.
2. Description of the Prior Art
A. Enhanced Throughput
Parallel processing has been recognized as a valuable mechanism for increasing computational speeds by performing concurrent or parallel computations. Various degrees of parallelism have been achieved in computers having both single and multiple processing units. These prior art approaches to the concurrency objective may be categorized into three broad areas: (1) implementation on a multitasking basis in a sequential processor, where concurrent processing paths are assigned priorities and compete for single stream resources; (2) implementation using special purpose hardware with multiple processors based on the concurrency requirement of the problem; and (3) implementation using a general purpose multiprocessor with a multiprocessing operating system to control it.
In the single processor multitasking solution, a single processor and its associated resources are time shared by programs running "concurrently" under the control of a multitasking operating system. The processor is required to provide (over any appreciable period of time) the processing power sufficient to accommodate the requirements along all paths plus the software overhead to multiplex between paths. In addition to assuring that all paths can be accommodated over any appreciable time interval, assurance must be provided for meeting the response time of each path in a worst case concurrency situation. The problems of meeting these requirements are compounded by operating system efficiency considerations. As a consequence, the processors must be sized to the specific problem with the capability of modular extentions typically not being accommodated other than by oversizing the processor to begin with.
In the special purpose multiprocessor approach, a computer is constructed based on a specific concurrency requirement. Examples of special purpose parallel computers that have been built are array processors such as the ILLIAC IV, STARAN I, SOLOMON II. These computers require large amounts of special purpose hardware, special programming structures, and are specially suited for problems involving large amounts of homogeneous parallelism such that identical operations are to be performed on multiple data items. Array processors allow multiple identical operations to be performed in parallel, thereby supporting the concurrency requirement. However, homogeneous parallelism represents a very small part of the parallelism present in computer programs, and therefore these special purpose computers are not typically suited to support the more general heterogeneous parallelism present in typical computer programs.
The multiprocessor with a multiprocessing executive is an attempt at a general solution which accommodates heterogeneous parallelism in modular increments. These solutions, however, are fraught with increasingly diminishing returns as the number of processors is increased. The reasons for the reduction in computing gain in a multiprocessor system are two fold: first, there is a large overhead associated with the software implementation of the single unified control mechanism in the operating system, and secondly, it is difficult to effectively exploit the high level (job or task) of parallelism in application programs.
These two problems have aggravated each other since the large overhead has been taken as the justification for the high level modeling of parallelism but by exploiting parallelism at the job or task level, much of the potential gain of multiprocessing is lost since typically there is some amount of parallelism within the job or task and this internal parallelism cannot be exploited.
B. Programmer Productivity
Programmer productivity has been cited as a major cost problem on automated data processing (ADP) systems. Software development and maintenance costs have continued to climb in the same era of drastic reductions in hardware costs. Structured programming and other disciplines have been defined to reduce the problem. Unilateral agreement among proponents of these disciplines seems to exist in four areas of concern relating to the structure of programs and the computer architectures to which they apply:
(1) a requirements-oriented structure;
(2) a structure for which only the essential aspects of program control must be specified by the programmer;
(3) a structure which eliminates transfers of control (GO TO, CALL, queueing requests, etc.); and
(4) a structure which simplifies the error-prone aspects of decision logic.
The significance of each of these requirement areas is discussed below.